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Position Title: Sr. Software Design Engineer

Skills required:	FPGA Place and Route algorithms
Location:	Mtn. View	State:	CA
Area:	650	Salary/Pay Rate:	DOE
Job Order#:	UE-60002	Term:	FTE EMP
Start Date:		Length:	Perm

JOB DESCRIPTION:
Great opportunity to join Pre-Ipo creating the standard in Programmable IP for the communications infrastructure!

Responsible for development and support of Place and Route tools for layout of end-user designs in proprietary FPGA style fabric.
Optimized layout must meet user specified constraints on performance and size.

Work closely with VP and Chief Technologist to design and implement proprietary place and route algorithms for company's programmable cores.

REQUIRED SKILLS:
BS/MS in Software Engineering
Proficient C and/or C++ code developer

DESIRED:
Experience with FPGA Place and Route algorithms.

COMMENTS:

DATE POSTED:

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